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Tcad simulation based device and circuit-level performance analysis of source pocket engineered gasb/si heterojunction vertical tfets
| dc.contributor.author | Tripathy, Manas Ranjan | |
| dc.date.accessioned | 2023-08-08T06:39:30Z | |
| dc.date.available | 2023-08-08T06:39:30Z | |
| dc.date.issued | 2020 | |
| dc.identifier.other | TH828 | |
| dc.identifier.uri | https://idr-sdlib.iitbhu.ac.in/handle/123456789/2520 | |
| dc.language.iso | en_US | en_US |
| dc.publisher | IIT(BHU) Varanasi | en_US |
| dc.rights.license | CC BY-NC-SA 4.0 | |
| dc.subject | Tcad simulation based device and circuit-level | en_US |
| dc.subject | performance analysis of source pocket engineered | en_US |
| dc.subject | gasb/si heterojunction vertical tfets | en_US |
| dc.subject | Abstract available in content. | en_US |
| dc.title | Tcad simulation based device and circuit-level performance analysis of source pocket engineered gasb/si heterojunction vertical tfets | en_US |
| dc.type | Thesis | en_US |
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