Tcad simulation based device and circuit-level performance analysis of source pocket engineered gasb/si heterojunction vertical tfets

Files

01_Title Page.pdf (1.8 MB)

02_Preliminary Page.pdf (5.63 MB)

03_Content.pdf (4.22 MB)

04_Abstract.pdf (1.19 MB)

05_Chapter 01.pdf (15 MB)

Date

Authors

Tripathy, Manas Ranjan

Publisher

IIT(BHU) Varanasi

Keywords

Tcad simulation based device and circuit-level, performance analysis of source pocket engineered, gasb/si heterojunction vertical tfets, Abstract available in content.

URI

https://idr-sdlib.iitbhu.ac.in/handle/123456789/2520

Collections

Department of Electronics Engineering