Energy efficient voltage scheduling for multi-core processors with software controlled dynamic voltage scaling

Abstract

Energy efficient voltage scheduling for multi-core processors is an important issue in the context of parallel and distributed computing. Dynamic voltage scaling (DVS) is used to reduce the energy consumption of cores. Nowadays processor vendors are providing software for DVS. We consider a system using a single multi-core processor with software controlled DVS having a finite set of discretely available core speeds. Our contribution to this work is solving a well-known energy efficient voltage scheduling problem on the considered system. The problem that we consider is to find a minimum energy voltage scheduling for a given computational load that has to be completed within a given deadline. First we show that the existing methods to solve this problem on other processor models fail to apply on our processor model. Then we formulate an Integer Program (IP) for the problem. Through a series of reductions we reduce the IP formulation of the problem into an Integer Linear Program (ILP) formulation and prove that the proposed IP for the problem can be solved in O(D(log(max(smax,p)+1)+qlog(Dp+1))+log(αpsmax3D)(2q(4q+3)log(max(Dp,C)+2))a2q) time where D is the given deadline, C is the amount of computation that has to be completed within the deadline of D time units, p is the number of cores, q is the number of possible core speeds, smax is the maximum speed of cores, and α and a are constants.