Self-biased silicon transistor with a piezoelectric gate for an efficient mechanical energy harvesting device

Abstract

In this study, a piezo potential gated self-biased transistor was fabricated on a heavily doped silicon (p+-Si) (111) substrate and used for efficient mechanical energy harvesting applications. The drain and source (S-D) electrode of this top gated transistor was made of LiF(5 nm)/Al(65 nm) and MoO3(5 nm)/Ag(65 nm), respectively, whereas piezoelectric poly (vinylidene fluoride-co-hexapropelene) (PVDF-HFP) thin film was used as the gate dielectric. Drain bias (VDS), which was required to transport the hole carrier through the channel, was developed from the work function difference of the S-D electrodes, whereas the piezopotential, which worked as the gate bias of this transistor, was developed from the external force applied on the PVDF-HFP thin film. Consequently, this device efficiently converted mechanical energy into electrical energy. For an applied pressure of 4 bar for ∼5 s, the extracted electrical power per cycle of this device was 1.6 × 10−9 watts with a conversion efficiency of ∼75%, which was an exceptionally high value compared with conventional energy harvesting devices. Besides, the electrical characterization showed its transistor-like behavior, and the extracted device parameters, including threshold force, on-off ratio, and subthreshold swing (SS), were 0.5 N, 4.56 × 102, and 3.16 N A−1, respectively. © 2025 The Royal Society of Chemistry.