Performance evaluation of double gate junctionless field effect transistor with vertical Gaussian doping profile
| dc.contributor.author | Singh B.; Gola D.; Kumar S.; Singh K.; Goel E.; Jit S. | |
| dc.date.accessioned | 2025-05-24T09:29:43Z | |
| dc.description.abstract | This paper presents, a simulation based study of Double Gate Junctionless Field Effect Transistor (DG-JLFETs) with Vertical Gaussian Doping profile.The proposed device structure improves the ON to OFF drain current ratio (by ), threshold voltage roll off (by mV),Drain Induced Barrier Lowering (DIBL) (by mV/V) and Sub-Threshold swing (by mV/dec at straggle parameter nm in comparison to uniformly doped channel double gate junctionless Field effect transistors. © 2016 IEEE. | |
| dc.identifier.doi | https://doi.org/10.1109/RTEICT.2016.7807930 | |
| dc.identifier.uri | http://172.23.0.11:4000/handle/123456789/16195 | |
| dc.relation.ispartofseries | 2016 IEEE International Conference on Recent Trends in Electronics, Information and Communication Technology, RTEICT 2016 - Proceedings | |
| dc.title | Performance evaluation of double gate junctionless field effect transistor with vertical Gaussian doping profile |