SPICE-Based Compact Model for Voltage-Induced Magnetocapacitance in Magnetic Tunnel Junctions

Abstract

Ensuring faster data processing and higher integration density while meeting the power budget is a challenging task as the world is moving toward next-generation computing. Therefore, researchers are looking for innovative ways to make computation more efficient. Magnetic tunnel junction (MTJ) devices have received enormous attention in recent years due to their non-volatility, low power consumption, high tunneling magnetoresistance (TMR), and scalability. However, TMR degradation with bias voltage became a major deficiency of the MTJ device. Another prominent phenomenon, i.e., tunnel magnetocapacitance (TMC) has been observed in MTJ, which has a high magnetic sensitivity, high thermal stability, and robustness to the applied bias voltage. Several MTJ models have been introduced in the past to emulate the magnetic switching behavior in MTJs, but they do not incorporate the TMC effect. In this article, SPICE-based spin-transfer torque (STT)-MTJ framework is introduced, which incorporates both TMR as well as TMC effects. Here, the voltage-induced TMC effect is modeled using a combination of the Debye-Fröhlich (DF) model using a Zhang-sigmoid theory along with parabolic barrier approximation (PBA) and spin-dependent drift-diffusion (SDD) model, which perfectly emulates the magnetocapacitance behavior with respect to frequency. Furthermore, the proposed model is validated using HSPICE simulations, and demonstrates good agreement with experimental data. This model can be used to implement new spintronics applications such as non-volatile logic-in-memory (LiM), spin logic devices, highly sensitive magnetic sensors, designing read-out circuits for sensors, and neuromorphic computing. © 1965-2012 IEEE.