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Shreenivas Deshpande Library, IIT (BHU), Varanasi

VLSI Architectures for the Core Transform in High Efficiency Video Coding

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Title.pdf (141.27 KB)
 CERTIFICATE.pdf (200.41 KB)
 ACKNOWLEDGEMENTS.pdf (782.92 KB)
 Contents.pdf (927.26 KB)
 Preface.pdf (2.32 MB)

Date

2019

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Publisher

IIT (BHU) varanasi

Abstract

Description

Keywords

VLSI Architectures, Core Transform

Citation

URI

https://idr-sdlib.iitbhu.ac.in/handle/123456789/1033

DOI

Collections

Department of Electronics Engineering

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