ReRAM-Based Crossbar Compatible Equality Checker for Neuromorphic Applications
| dc.contributor.author | Chaitanya G.S.; Pande S.; Arora A. | |
| dc.date.accessioned | 2025-05-23T11:12:49Z | |
| dc.description.abstract | We present our findings on the design and simulation of a ReRAM-based equality checker. The proposed equality checker is compatible with crossbar architectures and is implemented using the Memristive-Aided-Logic (MAGIC) family. The equality checker showcased here is engineered to perform parallel executions such that the number of execution steps remains independent of the number of input bits. Our work provides energy-efficient memristor-based neuromorphic hardware tailored for data-intensive applications. © 2024 IEEE. | |
| dc.identifier.doi | https://doi.org/10.1109/SCES61914.2024.10652554 | |
| dc.identifier.uri | http://172.23.0.11:4000/handle/123456789/5121 | |
| dc.relation.ispartofseries | 2024 IEEE Students Conference on Engineering and Systems: Interdisciplinary Technologies for Sustainable Future, SCES 2024 | |
| dc.title | ReRAM-Based Crossbar Compatible Equality Checker for Neuromorphic Applications |