Simulation, fabrication and characterization of sol-gel deposited ZnO based thin film transistors

Abstract

A bottom-gate thin film transistor (TFT) with ZnO as the channel layer and SiO 2 as insulating layer has been fabricated and characterized. Simulation of this TFT is also carried out by using the commercial software modeling tool ATLAS™ from Silvaco-International. The simulated global characteristics of the device were compared and contrasted with those measured experimentally. The experimental results are in fairly good agreement with those obtained from simulation. The TFT exhibited an off-current of 2.5 × 10 -7 A. The values of field effect channel mobility and on/off current ratio extracted for the device, measured 11 cm 2/V · s and ~10 2 respectively. The value of threshold voltage was found to be 1.3 V. © 2012 by American Scientific Publishers.