Fault Models and Test Approaches in Reversible Logic Circuits

Abstract

The operations in reversible circuits are fully controllable and observable due to their bijective property which provides cursive testing. Testing can be categorized into two behavioral schemes: (i) Online testing, where the detection of faults within the circuit is carried out during its operation, (ii) Offline testing, where test vectors are applied after extracting the circuit out from its normal operation and the correct output values are known. Test data minimization for a specific kind of fault model such as stuck-at, bridging, missing gate, cross-point, and cell faults, is an important factor in this type of testing using meta-heuristic algorithms and circuit modification methodologies. Diverse varieties of fault families in reversible logic circuits and an exclusive study of testable design advances for these faults are portrayed in this chapter. Plentiful approaches were projected under two extensive classifications to meet the challenge. The methodologies are alleged to coat almost all the faults and their sub kind by exploiting the properties of reversible gates and circuits. The objective is to minimize testing overhead, which can be achieved by reducing the cost metrics utilized for testability. © 2020, Springer Nature Singapore Pte Ltd.