Impact of Strain on Electrical Characteristic of Double-Gate TFETs with a SiO2/RfO2Stacked Gate-Oxide Structure

Abstract

This paper presents the impact of strain on the electrical characteristic such as drain current, threshold voltage, and subthreshold swing (SS) of double-gate tunnel FETs (DG TFETs) with a SiO2/High-k stacked gate-oxide structure. The results obtained from simulation are discussed using energy band diagram, tunneling barrier width, and compared with conventional DG TFETs structure. From the simulation results, it is clear that application of strain on DG TFETs with stacked gate structure shows higher I-{\mathrm{ON}}/{I}-{\mathrm{OFF}}, lower subthreshold swing (SS) and minimum {V}-{\mathrm{T}} as compare to conventional DG TFETs structure. All the simulation are done in ATLAS 2-D device simulator from SILVACO for channel length of 60 nm using nonlocal band-to-band tunneling model and application of strain in the channel region. © 2017 IEEE.