Repository logo
Institutional Digital Repository
Shreenivas Deshpande Library, IIT (BHU), Varanasi

Design of Single-Bit Fault-Tolerant Reversible Circuits

dc.contributor.authorGaur H.M.; Singh A.K.; Mohan A.; Fujita M.; Pradhan D.K.
dc.date.accessioned2025-05-23T11:26:43Z
dc.description.abstractThis article introduces redundant design approaches for reversible circuits (RCs) that have the ability to detect and tolerate single-bit fault without the need of conventional voting scheme. Experiments preformed show that the proposed scheme reduces the gate cost on average with up to 28% as compared with tri-modular redundant circuits. RCs have direct relation with quantum computation which are largely to loss of energy levels due to the phenomenon of quantum decoherence that cause single point failures.
dc.identifier.doihttps://doi.org/10.1109/MDAT.2020.3006808
dc.identifier.urihttp://172.23.0.11:4000/handle/123456789/10630
dc.relation.ispartofseriesIEEE Design and Test
dc.titleDesign of Single-Bit Fault-Tolerant Reversible Circuits

Files

Collections