Dual-Material Ferroelectric Stacked Gate SiO2/PZT SOI Tunnel FETs with Improved Performance: Design and Analysis
| dc.contributor.author | Kumar S.; Singh P.K.; Chander S.; Rahangdale A.; Baral K.; Jit S. | |
| dc.date.accessioned | 2025-05-24T09:31:49Z | |
| dc.description.abstract | In this work, two-dimensional (2-D) numerical simulation study of a dual-material (DM) ferroelectric stacked gate silicon-on-insulator (SOI) tunnel field-effect transistors (TFETs) structures have been demonstrated. In this paper, Pb(Zr0.45Ti0.55)O3 (PZT) ferroelectric material has been used over SiO2 layer in the stacked-gate manner of the device. The combined effects of ferroelectric dielectric and dual-material have been used to improve the superior performance in the terms of subthreshold swing (SS) and ON-state current compared to the conventional SOI TFET device. A two-dimensional (2-D) commercial simulation software ATLASTM has been used to plot the results of DM ferroelectric stacked gate SOI TFET devices. © 2018 IEEE. | |
| dc.identifier.doi | https://doi.org/10.1109/SPIN.2018.8474280 | |
| dc.identifier.uri | http://172.23.0.11:4000/handle/123456789/17414 | |
| dc.relation.ispartofseries | 2018 5th International Conference on Signal Processing and Integrated Networks, SPIN 2018 | |
| dc.title | Dual-Material Ferroelectric Stacked Gate SiO2/PZT SOI Tunnel FETs with Improved Performance: Design and Analysis |