A simplified gate pulse generation technique for modified multilevel DC-Link inverter
| dc.contributor.author | Pilli N.K.; Meena R.K.; Singh S.K. | |
| dc.date.accessioned | 2025-05-24T09:30:20Z | |
| dc.description.abstract | DC-Link based multilevel inverter was first introduced by Gui-Jia Su [1]. This paper concentrates on modified multilevel DC-link inverter (MMLDCLI) with further reduction of switch count for same level generation. A simplified gate pulse generation technique is proposed in this paper for MMLDCLI. The proposed gate pulse generation technique is able to change the number of output voltage levels without altering the input DC voltage source. Low THD in output voltage is achieved with proposed pulse generation technique. The MMLDCLI is simulated in MATLAB-SIMULINK and is validated with hardware prototype. © 2017 IEEE. | |
| dc.identifier.doi | https://doi.org/10.1109/IAS.2017.8101795 | |
| dc.identifier.uri | http://172.23.0.11:4000/handle/123456789/16915 | |
| dc.relation.ispartofseries | 2017 IEEE Industry Applications Society Annual Meeting, IAS 2017 | |
| dc.title | A simplified gate pulse generation technique for modified multilevel DC-Link inverter |