Hybrid Clamped Four-Level T-Type Inverter with Capacitor Voltage Self-Balancing

Abstract

This paper investigates the performance of a new three-phase four-level hybrid clamped T-type inverter (4mathrm{L}mathrm{H}mathrm{C}mathrm{T}^{2}mathrm{I}) topology with a capacitor voltage self-balancing strategy. The three-phase four-level hybrid T-type inverter is formed by adding a half-bridge module to an existing three-level T-type inverter. Therefore, it only requires fourteen active switches compared to eighteen in other fourlevel inverter topologies. The proposed space vector pulse width modulation (SV-PWMs) for three-phase 4mathrm{L}-mathrm{H}mathrm{C}mathrm{T}^{2}mathrm{I} can produce four-level output voltages with improved harmonic performance on the ac side for medium to higher modulation indices. The voltage balancing of the DC-link capacitors is achieved by using the concept of virtual vectors created to nullify the effect of neutral currents flowing through the clamping points during the operation of the inverter. The duty ratios of these virtual vectors are further adjusted with the help of a dynamically calculated multiplication factor. The configuration is verified using MATLAB/SIMULINK and compared with the other three-level and four-level topologies in terms of total harmonic distortion (THD) and power Losses. © 2022 IEEE.