The pure zigzag model for routing in a NoC

Abstract

The billion-transistor era of application-specific semiconductor chips will technologically be entered within a very short period of time. The chips, which has a wide application domain faces demanding changes in its design due to the huge complexity of systems and increasing design productivity gap. Interconnection networks may be used instead of global wiring structures so that it provides a more compact and modular design, but apart from the high speed computing cores, it provides an efficient and reliable communication mechanism in the modern day processors. Here packets are used to communicate with the system modules. The routing algorithm used should be able to deliver the packets to the modules by handling the network congestion efficiently and with minimum packet latency. © 2012 IEEE.