Area-Efficient Auto-Write-Terminate Circuit for NV Latch and Logic-In-Memory Applications

Abstract

Spin transfer torque (STT) based magnetic tunnel junction (MTJ) device is a commercially appealing option for non-volatile latches and flip-flops. In this brief, an STT-MTJ based non-volatile latch with auto-write-terminate (AWT) feature is proposed. The proposed latch has a simple structure, better stability, and higher speed, and is easy to integrate with CMOS logic styles. Also, no additional write driver circuit is needed, resulting in a smaller footprint while writing into the MTJs. Therefore, the proposed latch consumes less power than earlier latches while using fewer transistors for a write operation and logic implementation. The proposed AWT circuit continuously monitors the write operation and prevents redundant MTJ writing and removes excessive write current flow, thereby saving write energy. The AWT circuitry can save the total write energy by 83% when compared to the conventional write circuit. Also, the proposed circuitry for self-write termination uses 75% fewer transistors compared to previously proposed circuits. © 2004-2012 IEEE.