Frequency Sensitive Circuit Design

Abstract

Constant power consumption is a problem in lowpower devices, especially in wearable electronics such as ECG monitors. This issue is targeted in the research article by designing and simulating a frequency-sensitive triggering circuit. The purpose is to make a main circuit operational when an input signal is in a particular frequency band, which is the 0-150 ~Hz band. This is done by designing a low pass filter that enables only signals in the required frequency range while blocking other frequencies at the supply of 3.3 V. The filtered signal is then converted from AC to DC using the rectifier circuit, which gives a steady voltage output. A comparator is used to initiate the main circuit by comparing the generated voltage with a reference voltage. The result is a significant decrease in power consumption as the circuit takes only 23.1 μ W, which is immensely lower than ECG wearable devices having a sleep mode power consumption that ranges up to 3 mW. This is the approach that provides a more efficient solution for the constant monitoring of wearable healthcare devices. © 2024 IEEE.